Hi! I'm Abhishek Vashist,
Hi! I'm Abhishek Vashist,
I focus on open source RTL/ASIC Design and ML Applications
I focus on open source RTL/ASIC Design and ML Applications
Ph.D. @ Rochester Institute of Technology, USA
Ph.D. @ Rochester Institute of Technology, USA
Computer Engineering
Apple, CA, USA
Apple, CA, USA
- Pixel IP Design Engineer
Custom RISC Processor RTL Design
Custom RISC Processor RTL Design
Implemented a 16-bit custom RISC ISA architecture with a 2-way set associative Cache memory using Verilog HDL. Testing is performed on FPGA board. Additionally wrote a Python Assembler for the ISA and implemented MNIST digit classification on the processor.
Machine Learning based 60 GHz Wireless Localization
Machine Learning based 60 GHz Wireless Localization
Best Paper Award at IEEE International Conference on Consumer Electronics (ICCE) 2020, Las Vegas, USA.
Paper link: ML_localization_autonomous_vehicle
Synchronous FIFO
Synchronous FIFO
Design and verification of synchronous FIFO using SystemVerilog Assertions (SVAs). Formal verification using open-source SymbiYosys tools. Final synthesis on FPGA board